1. Field of the Invention
The present invention relates to a semiconductor memory device suitably implemented by an EPROM (Erasable Programmable Read-Only Memory), an EEPROM (Electrically Erasable and Programmable Read-Only Memory) or the like and using as a memory cell a transistor capable of trapping electrons or holes in an insulation film formed above a channel region and a method of reading out information for the semiconductor memory device.
2. Description of the Prior Art
The typical prior art is disclosed in a document entitled "A True Single-Transistor Oxide-Nitride-Oxide EEPROM Device" IEEE ELECTRON DEVICE LETTERS, VOL. EDL-8, NO.3, MARCH 1987, PP93-95, and the construction of a semiconductor memory device in the prior art is illustrated in FIGS. 9(a) and 9(b). More specifically, in a transistor constituting a memory cell used in the semiconductor memory device, an n.sup.+ -type impurity region having a high concentration is provided on a p-type semiconductor substrate 1 to form a source region 2 and a drain region 3, an insulation film 4 capable of trapping electrons or holes is formed on the surface of the semiconductor substrate 1 between the source region 2 and the drain region 3, and a gate 5 is formed on the insulation film 4. The insulation film 4 is constituted by a so-called ONO film having a structure in which a nitride film 4C is sandwiched between a tunnel oxide film 4A and a top oxide film 4B.
As shown in FIG. 9(a), when positive high voltages (for example, 10 volts and 9 volts) are respectively applied to the gate 5 and the drain region 3 and the source region 2 is grounded to cause a current to flow between the source and the drain, hot electrons are generated in an end 3A of the drain region 3. The hot electrons are locally injected into the insulation film 4 in the vicinity of the drain region 3, to be trapped in the nitride film 4C.
The profile of the impurity concentration of a diffusion layer constituting the drain region 3 is rapidly changed in the boundary between the drain region 3 and a channel region 8. Consequently, a strong electric field is formed in the boundary between the channel region 8 and the drain region 3, so that hot electrons are easily produced.
When information is read out, the source region 2 is grounded and a predetermined positive voltage (for example, 1 volt) is applied to the drain region 3, as shown in FIG. 9(b). In this state, a predetermined sense voltage (for example, 3 volts) is applied to the gate 5. A threshold voltage Vth for allowing conduction between the source and the drain differs depending on the state of the insulation film 4. That is, the threshold voltage Vth takes a high value V1 in a state where electrons are injected into the insulation film 4, while taking a low value V2 (V2&lt;V1) in a state where no electrons are injected. If the above-mentioned sense voltage is set to a voltage between the high threshold voltage and the low threshold voltage, therefore, information stored in this cell can be read out by applying such a sense voltage to the gate 5 and watching whether or not conduction occurs between the source and the drain.
Stored information can be erased by irradiation of ultraviolet rays to disperse the electrons in the insulation film 4 as well as by applying a relatively high voltage to the area between the gate and the drain to inject hot holes produced in the end of the drain region 3 into the insulation film 4 so as to neutralize the electrons in the insulation film 4.
In the above-mentioned prior art, however, the electrons are locally stored in the insulation film 4 in the vicinity of the drain region 3. Accordingly, it is difficult in a writing state to raise the threshold voltage Vth (=V1). It therefore is difficult to make large the amount of the change of the threshold voltage Vth (hereinafter referred to as a "memory window") .DELTA.V.sub.FB (=V1-V2). This will be described in detail with reference to FIG. 9(b).
More specifically, in the above-mentioned prior art, the positive read voltage is applied to the drain region 3 at the time of reading. When the voltage applied to the drain region 3 is high, a depletion layer 7 extends from the end of the drain region 3 so that the channel region 8 disappears. Alternatively, a space-charge layer appears. Since charges injected into this space-charge layer are accelerated with little resistance, they are moved between the source and the drain without being significantly affected by the charges trapped in the insulation film 4. Consequently, even if electrons are trapped in the insulation film 4, the threshold voltage Vth cannot be made sufficiently high.
When the positive sense voltage is applied to the gate 5 in a state where electrons are injected into the insulation layer 4 so that the threshold voltage Vth takes a high value V1, therefore, conduction may occur between the source and the drain due to a current flowing through the above-mentioned space-charge layer. That is, a slight shift of the sense voltage to be applied to the gate 5 at the time of reading results in erroneous reading because the memory window .DELTA.V.sub.FB is small. The operation of the memory cell is liable to be unstable because of the difficulty in making the memory window .DELTA.V.sub.FB large.
On the other hand, an attempt to inject large amounts of hot electrons into the insulation film 4, so as to make the memory window .DELTA.V.sub.FB large, causes the necessity of applying a relatively high voltage to the drain region 3 at the time of writing, resulting in a decreased number of times the memory cell may be written into.
On the other hand, the impurity concentration of the drain region 3 is abruptly changed in the boundary between the drain region 3 and the channel region 8 so as to enhance the production efficiency of hot electrons, as described above. However, the memory cell has a structure in which hot electrons are thus easily produced. Accordingly, trace amounts of hot electrons are produced even by a low voltage applied to the drain region 3 at the time of reading. Consequently, every time information is read out from the cell, trace amounts of hot electrons produced in the end 3A of the drain region 3 are injected into the insulation film 4. Therefore, the threshold voltage Vth of the transistor is slightly changed. Such a phenomenon is generally referred to as soft writing.
The higher the read voltage applied to the drain region 3 at the time of reading is, the more easily soft writing occurs. Accordingly, if an attempt to realize constant resistance to soft writing is made, the read voltage is restricted to a low voltage. Consequently, there is a limit on a read current of the cell, so that the reading speed is prevented from being increased.